The Cellular Automata of John von Neumann
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Counters and buffers
 
Counters
Counters, more precisely n-counters, serve mostly to provide the timing of automaton processes. An n-counter is an organ that releases a pulse just after receiving n sparse pulses. The figure here below shows four n-counters with n = 2, 3, 4, 5.
 
Image counters.GIF
 
These simple organs exploit the property that a vacuum state activated by a single pulse evolves spontaneously towards a quiescent ordinary transmission state (right blue-arrow) through a sequence of sensitized states. Therefore, if n sparse enough pulses propagate along a horizontal transmission line with n gaps (missing arrows), just n input pulses are needed to bridge all gaps, thus letting any further input-pulse to reach the output line. Since filling a one-cell gap through a sequence of sensitized states lasts 4 or 5 time steps, it is clear that the pulses are sparse enough if they are spaced by more than 5 quiescent states. If we want that only one pulse is released at output every n input pulses, the organ must be provided by a self-resetting device. This can be formed by one or more special transmission states (red arrows) activated by the first pulse arriving to output. In fact, the pulses released by the red arrows annihilate the bridging arrows, thus restoring the n gaps.
   The figure here below shows a self-resetting 5-counter provided with an input line for external resetting.
           
Image reset_counter.GIF
 
The external resetting restores all gaps independently of whether they are bridged or not. You can find several examples of working counters in the automaton-file COUNTERS.EVN.
 
Buffers
It is quite evident that cellular automata capable of performing complex operations need memory devices. There are several ways to implement memories capable of storing n binary digits (n-bit buffers). The universal constructor UC_REP_UNITS.JVN contains five 1-bit buffers working (also in the EVN enviroment) as shown in the figure here below.
 
Image 1-bit_buffer_jvn.GIF
 
In A, an input pulse activates a 5-pulse coder resulting in the activation of a small buffering circuit, as shown in A'. The buffering circuit includes a confluent state and an ordinary transmission state pointing to a second confluent state. In B, an input pulse activates a 6-pulse coder, which annihilates the active confluent state and creates immediately a quiescent confluent state. This operation inactivates the buffering circuit. C, C' and D, D' show a 1-bit reading process that uses a confluent state as a logical AND. The next figure shows a 1-bit buffer working only in the EVN environment.

Image 1bit_buffer.GIF
 
The device has two inputs and one output. One of the two inputs is used to store the bit, the other to read the memory content (0 or 1). The bit 1 is stored as an excited confluent state (orange diamond). After the reading process, the memory content is automatically reset to 0 (gray diamond). In A, a pulse enters the reading line. In A', since the stored bit is 0, no pulse is released. In B, a pulse enters the writing line. This operation results to the excitation of the confluent state (orange diamond). In C, a pulse enters the reading line. In C', since the stored bit is 1, a pulse is released.
   The next figure shows a 5-bit buffer working only in the EVN environment. It collects a sequence of 5-bit sequence formed by zeros and ones sparsely inputted one by one to lines 0 and 1 respectively. These bits are sent both to a 5-counter and to an organ called the collector where are stored as excitation levels in an array of spaced confluent states, as detailed after the next figure. The bits pass then to a second confluent-state array and recovered from here as an activation train by a suitable procedure.
 
Image 5bit_buffer.GIF
 
The first bit 0 or 1 is stored as an unexcited or excited level of the first confluent state of the (bit) collector. Whenever a new bit arrives, the array of bits shifts one step right, so that the bit can be in turn stored in the first confluent state just freed. Therefore, the collector behaves as a shift register. The shift is caused by the creation of a temporary set of right blue-arrows in the inter-spaces of the confluent-state array, what is done by the red arrows under the action of an activation train generated by coder c1. As soon as just 5 bits are collected, the counter releases a pulse that starts coder c2, which generates an activation train that makes the red arrows create a transitory set of down blue-arrows. This operation produces the transfer of the excitation levels from the first to the second confluent-state array. Since these confluent states are in touch with a left blue-line, the excitation levels are immediately collected by this line and sent away as an activation train. The organ just described is available in 5-BIT_BUFFER.EVN and the fragment-file 5-BIT_BUFFER.EFR.
   The next figure shows a 6-bit buffer (working only in EVN) where the counter is replaced by an external control R that starts, through coder c1, the release of the collected bit sequence.
 
Image 6bit-buffer.GIF
 
The device also releases the rightmost stored bit whenever a new sparse bit is inputted, thus providing a sort of delayed output. This organ is available in the fragment file 6-BIT_BUFFER.EFR.